Not applicable.
Not applicable.
The present invention relates to motor controllers and more particularly to a method and an apparatus for compensating for switching device dynamics in inverter systems.
One type of commonly designed motor is a three phase motor having three Y-connected stator windings. In this type of motor, each stator winding is connected to an AC voltage source by a separate supply line, the source providing time varying voltages across the stator windings. Often, an adjustable speed drive (ASD) will be positioned between the voltage source and the motor to control motor speed by controlling the stator voltages and frequency.
Many ASD configurations include a pulse width modulated (PWM) inverter consisting of a plurality of switching devices and a PWM controller. Referring to FIG. 1, an exemplary PWM inverter leg 10 corresponding to one of three motor phases includes two series connected switches 12, 13 between positive and negative DC rails 18, 19 and two diodes 16, 17, a separate diode in inverse parallel relationship with each switch 12, 13. By turning the switches 12, 13 ON and OFF in a repetitive sequence, leg 10 receives DC voltage via rails 18 and 19 and provides high frequency voltage pulses to a motor terminal 22 connected to a stator winding 24. By firing the switching devices in a regulated sequence the PWM inverter can be used to control both the amplitude and frequency of voltage that are eventually provided across windings 24.
Referring to FIG. 2, an exemplary sequence of high frequency voltage pulses 26 that an inverter might provide to a motor terminal can be observed along with an exemplary low frequency alternating fundamental voltage or terminal voltage 28 and related alternating current 30. By varying the widths of the positive portions 32 of each high frequency pulse relative to the widths of the negative portions 34 over a series of high frequency voltage pulses 26, a changing average voltage which alternates sinusoidally can be generated. The changing average voltage defines the terminal voltage 28 that drives the motor. The terminal voltage 28 in turn produces a low frequency alternating current 30 that lags the voltage by a phase angle xcfx86.
The hardware that provides the firing pulses to the PWM inverter is typically referred to as a PWM controller. A typical controller includes, amount other things, a PWM generator. Various controller components receive a command operating frequency and convert the operating frequency into three phase modulating waveforms that are provided to the PWM generator. Referring to FIG. 3(a), illustrative waveforms used by a signal generator to generate the firing pulses for leg 10 may be observed. As well known in the art, a carrier waveform 36 is perfectly periodic and operates at what is known as the carrier frequency. A modulating voltage waveform 38 is typically sinusoidal, having a much greater period than the carrier waveform 36.
Referring also to FIGS. 3(b) and 3(c), an upper signal 40 and a lower signal 42 that control the upper and lower switches 12, 13 respectively can be observed. The turn-on tu1, tu2 and turn-off to 1, to 2 times of the upper and lower signals 40, 42 come from the intersections of the modulating waveform 38 and the carrier waveform 36.
When the modulating waveform 38 intersects the carrier waveform 36 while the carrier waveform has a positive slope, the upper signal 40 goes OFF and lower signal 42 goes ON. On the other hand, when the modulating waveform 38 intersects the carrier waveform 36 while the carrier waveform has a negative slope, the upper signal 40 goes ON and the lower signal 42 goes OFF. Thus, by comparing the carrier waveform 36 to the modulating waveform 38, the state of the upper and lower signals 40, 42 can be determined.
Referring also to FIGS. 2 and 3(d), an ideal high frequency voltage pulse 26 resulting from the ideal upper and lower signals 40, 42 in FIGS. 3(b) and 3(c) that might be provided at terminal 22 can be observed. When the upper signal 40 is ON and the lower signal 42 is OFF, switch 12 allows current to flow from the high voltage rail 18 to motor terminal 22 thus producing the positive phase 44 of pulse 26 at motor terminal 22. Ideally, when the upper signal 40 goes OFF and the lower signal 42 goes ON, switch 12 immediately turns OFF and switch 13 immediately turns ON connecting motor terminal 22 and the low voltage rail 19 producing the negative phase 46 of pulse 26 at terminal 22. Thus, the ideal high frequency voltage pulse 26 is positive when the upper signal 40 is ON and is negative when the lower signal 42 is ON. Also, ideally, the low frequency terminal voltage and corresponding current (see FIG. 2) should be completely sinusoidal and mirror the operating waveforms.
As well known in the motor controls art, when an inverter terminal is linked to an inductive load, the load current cannot reverse directions immediately upon switching of inverter switches and therefore the currents caused by the high frequency voltage pulses are at least partially smoothed by the inductive load. Early technology used to configure inverter switches was relatively rudimentary and therefore, not surprisingly, switching speed was relatively slow. In fact, despite the waveform smoothing load inductance, early inverters often caused appreciable amounts of terminal voltage ripple that, in some applications, was unacceptable. For this reason many early inverter configurations included complex and bulky filter configurations to smooth out the terminal voltages.
Recently much faster switches have been developed and adopted by the controls industry that reduce terminal voltage ripple and therefore, at least in some inverter configurations, substantially minimize the need for complex filter configurations. For instance, high speed IGBTs are capable of turning on or off in as little as several tens of nanoseconds (i.e., 50 nsec).
While fast switching IGBTs are now routinely used to configure inverters, in many cases the higher switching speeds have resulted in other adverse operating characteristics and operating phenomenon. One adverse characteristic is that some motors, due to their construction, resonate and generate ringing noise at frequencies corresponding to specific carrier frequencies. To address this problem several prior references teach that the carrier signal frequency can be reduced as the operating frequency is increased. To this end, see U.S. Pat. No. 4,691,269 and U.S. Pat. No. 5,068,777.
Other adverse operating phenomenon, including reflected waves, bearing currents, conducted interference, turn-on delays and radiated interference, have been effectively dealt with by modifying operating waveforms and in other ways calculated to compensate for associated distortions. These phenomenon that are already compensated for will be referred to generally as xe2x80x9cother phenomenonxe2x80x9d.
Unfortunately, while efforts to reduce the effects of these other phenomenon have reduced terminal voltage distortions, experience has shown that even after these efforts, under certain circumstances, appreciable terminal voltage distortion still occurs. While not well understood, some in the industry have generally recognized that these circumstantial distortions are due to complex capacitive and inductive interaction between inverter devices and other system components (e.g. supply lines, motor windings, filter devices, etc.). The causes of these circumstantial distortions are generally referred to herein as xe2x80x9cparasiticsxe2x80x9d and the distortions as parasitic distortions. FIGS. 4-6 demonstrate the effects of parasitics on drive performance. FIG. 4 shows the phase current for a 10 hp industrial drive with full compensation for the other phenomenon with a load cable of approximately 3 m (10 ft) where the carrier frequency is 2 kHz and the operating frequency is 2 Hz. As can be seen in FIG. 4, under these circumstances, while there is some ripple in the terminal currents, the ripple is relatively minimal.
FIG. 5 shows a current waveform generated using the same configuration as that used to generate the waveform in FIG. 4 where the carrier frequency has been increased from 2 kHz to 8 kHz. Clearly the carrier frequency increase causes appreciable distortion in the resulting terminal current waveform and would likely result in motor cogging.
FIG. 6 shows a current waveform generated using the same configuration as that used to generate the waveform in FIG. 5 with an 8 kHz (i.e., same frequency as in FIG. 5) carrier frequency where the cable length has been increased from 3 meters to 60 meters (i.e., 200 ft). Here the terminal current is further distorted and also includes a positive DC offset.
To compensate for parasitic distortions some industry members have developed complex and relatively hardware intensive feedback loops. Many of these systems require dedicated sensors (e.g., temperature, current, voltage, etc.) and processors to perform relatively computationally intensive algorithms to reduce parasitic distortions. Unfortunately, these systems, as might be expected, are relatively expensive and hence are not an option in the case of relatively inexpensive applications.
Thus, it would be advantageous to have a simple and inexpensive system that is controlled to minimize ripple while still providing a high switching frequency where possible.
It has been recognized that parasitics are caused by the interaction of inverter switches with other system hardware and that, given the inductive and capacitive nature of various system components, the amount of terminal current parasitic distortion is related to operating and carrier signal frequencies. More specifically, it has been recognized that parasitic distortion is generally large and unacceptable during low operating frequency and high carrier frequency control. It has also been recognized that parasitic distortion is generally low and acceptable during low operating and carrier frequency control. To this end see again FIGS. 4 and 5 where an inverter was operated at a low 2 Hz operating frequency and the carrier frequency was 2 kHz and 8 kHz, respectively.
Surprisingly, experiments have shown that as operating frequency is increased to relatively higher values, parasitic distortion due to high carrier frequencies is appreciably reduced. In fact, at higher operating frequencies, carrier frequency can often be set at levels that essentially eliminate ripple distortion without causing appreciable parasitic distortion such that the resulting amount of terminal current distortion is minimized. Moreover, it has been recognized that where the operating frequency is relatively high, even in long cable (e.g., 200 ft) configurations, the carrier frequency can be set relatively high without causing the DC offset shown in FIG. 6 and without causing the parasitic distortion which is also shown in FIG. 6.
Taking advantage of the surprising realizations described above, in order to maintain a high switching frequency where possible while still minimizing terminal current distortion, a carrier selector is provided that alters the carrier frequency as a function of operating frequency. The invention includes a generator that receives each of the operating frequency and command carrier frequency and, when the operating frequency is below a low threshold operating frequency, sets the carrier frequency to a minimum carrier frequency and, when the operating frequency is above the low threshold operating frequency, sets the carrier frequency to a higher value. More specifically, where the operating frequency is above the high threshold frequency the carrier frequency is set at the command carrier frequency and between the high and low threshold frequencies the carrier frequency is set at intermediate carrier frequency levels.
The invention also includes an apparatus for controlling an inductive load, the apparatus comprising a reference voltage generator for receiving an operating frequency and generating modulating waveforms corresponding thereto, a carrier generator for receiving the operating frequency and generating a restricted carrier waveform that is restricted to a minimum carrier frequency when the operating frequency is below a low threshold frequency and is restricted to an other carrier frequency when the operating frequency is above a high threshold frequency where the other carrier frequency is greater than the minimum carrier frequency, a PWM generator for comparing the modulating waveforms and the restricted carrier waveform and generating PWM firing signals there from and an inverter receiving the PWM pulses and generating output voltages at terminals linked to the load.
In one aspect the invention may include a carrier frequency selector useable to set the other carrier frequency wherein the selector provides the other carrier frequency to the carrier generator, the other carrier frequency being a command carrier frequency. In some embodiments, between the low and high threshold frequencies the carrier generator generates a carrier frequency between the minimum and the command carrier frequencies. In other embodiments, between the low and high threshold frequencies the carrier generator causes a linear transgression between the minimum carrier frequency and the command carrier frequency. In yet other embodiments, between the low and high threshold operating frequencies there are N intermediate operating frequencies and wherein, at each of the N intermediate operating frequencies the carrier generator generates a separate intermediate carrier frequency where each of the intermediate carrier frequencies is between the minimum and command carrier frequencies.
In some embodiments the minimum carrier frequency is approximately 2 kHz, the low threshold frequency is approximately 2 Hz and the high threshold frequency is approximately 8 Hz.
The invention also includes an apparatus for reducing inverter terminal voltage distortion in a system that receives an operating frequency signal, converts the operating frequency signal to modulating waveforms and compares a carrier waveform to the modulating waveforms to generate inverter firing pulses, the system also including a carrier frequency selector for selecting a command carrier frequency. Here the apparatus comprises a carrier generator receiving the operating frequency signal and the command carrier frequency and generating a restricted carrier waveform that is restricted to a minimum carrier frequency when the operating frequency is below a low threshold operating frequency and is restricted to the command carrier frequency when the operating frequency is above a high threshold operating frequency where the command carrier frequency is greater than the minimum carrier frequency.
The invention further includes a method for reducing inverter terminal voltage distortion in a system that receives an operating frequency signal, converts the operating frequency signal to modulating waveforms and compares a carrier waveform to the modulating waveforms to generate inverter firing pulses, the system also including a carrier frequency selector for selecting a command carrier frequency, the method comprising the steps of receiving an operating frequency signal and a command carrier frequency and generating a restricted carrier waveform that is restricted to a minimum carrier frequency when the operating frequency is below a low threshold operating frequency and is restricted to the command carrier frequency when the operating frequency is above a high threshold operating frequency, wherein the command carrier frequency is greater than the minimum carrier frequency.
Between the low and high threshold operating frequencies, the method may include generating a carrier frequency between the minimum and the command carrier frequencies. In the alternative, between the low and high threshold operating frequencies, the method may include causing a linear transgression between the minimum carrier frequency and the command carrier frequency. According to yet another alternative, between the low and high threshold operating frequencies there may be N other intermediate frequencies and wherein, at each of the N intermediate frequencies the method includes the step of generating a separate intermediate carrier frequency where each of the intermediate carrier frequencies is between the minimum and command carrier frequencies.
These and other objects, advantages and aspects of the invention will become apparent from the following description. In the description, reference is made to the accompanying drawings which form a part hereof, and in which there is shown a preferred embodiment of the invention. Such embodiment does not necessarily represent the full scope of the invention and reference is made therefore, to the claims herein for interpreting the scope of the invention.